What Is Two's Complement?
Two's complement is the standard method used by virtually every modern computer and processor to represent signed integers (both positive and negative whole numbers) in binary. When you store a negative number like -13 in a computer's memory, it is stored using two's complement representation.
The key insight of two's complement is that it allows a single hardware circuit to perform both addition and subtraction correctly for both positive and negative numbers. There is no need for a separate "minus" bit that the CPU has to check — the arithmetic works out automatically. This makes two's complement enormously more efficient than earlier methods like sign-magnitude representation.
Understanding two's complement is fundamental to computer science, digital electronics, programming, and computer architecture. It is covered in every introductory computer science course and is directly relevant to understanding how integers are stored in languages like C, Java, Python, and every other programming language.
In an n-bit two's complement system, the most significant bit (leftmost bit) is the sign bit. If the sign bit is 0, the number is positive or zero. If the sign bit is 1, the number is negative. This single bit distinction tells the CPU and programmer the sign of the stored integer.
Two's Complement Formula — Plain Language
The two's complement of a negative number is calculated in three clear steps. For positive numbers, two's complement is simply the regular binary representation with leading zeros to fill the bit width.
Step 1: Write the binary of the absolute value of the number (ignore the minus sign)
Step 2: Flip all bits — every 0 becomes 1, every 1 becomes 0 (this is the one's complement)
Step 3: Add 1 to the result
The final result is the two's complement representation of the negative number.
An alternative mathematical formula: for an n-bit system, the two's complement of a number N is 2ⁿ + N (where N is negative). For example, -13 in 8-bit: 2⁸ + (-13) = 256 - 13 = 243. Convert 243 to binary: 11110011. This is the same result as the flip-and-add-1 method.
Step-by-Step Two's Complement Examples
Example 1: Convert -13 to 8-bit Two's Complement
000011011111001011110011 ← This is -13 in 8-bit two's complementExample 2: Convert -1 to 8-bit Two's Complement
11111111. So -1 in 8-bit two's complement is all 1s: 11111111. This is a useful reference — in any n-bit system, -1 is always all 1s.Example 3: Convert -128 to 8-bit Two's Complement
10000000. Notice there is no +128 in 8-bit — the range is -128 to +127. This asymmetry (one more negative than positive) is a fundamental property of two's complement.Two's Complement Ranges by Bit Width
The number of distinct values representable in an n-bit two's complement system is always 2ⁿ. The range is asymmetric — there is always one more negative number than positive.
| Bit Width | Minimum Value | Maximum Value | Total Values | Used In |
|---|---|---|---|---|
| 4-bit | -8 | +7 | 16 | Nibble, BCD, some microcontrollers |
| 8-bit | -128 | +127 | 256 | byte, char, int8_t in C |
| 16-bit | -32,768 | +32,767 | 65,536 | short int, int16_t, Java short |
| 32-bit | -2,147,483,648 | +2,147,483,647 | ~4.3 billion | int in C/Java/Python, int32_t |
| 64-bit | -9.22 × 10¹⁹ | +9.22 × 10¹⁹ | ~18.4 quintillion | long in Java/C, int64_t, Python int |
Why Computers Use Two's Complement — Not Sign-Magnitude
Sign-magnitude is the intuitive way to represent negative numbers — use one bit for the sign and the remaining bits for the magnitude. For example, +5 = 0101 and -5 = 1101 in 4-bit sign-magnitude. This seems simple, but it creates major problems:
| Problem | Sign-Magnitude | Two's Complement |
|---|---|---|
| Zero representation | Two zeros (+0 = 0000, -0 = 1000) | Only one zero (0000) |
| Addition circuit | Requires special negative handling | One circuit handles all cases |
| Subtraction | Needs separate subtraction circuit | Subtract = Add negative (same circuit) |
| Hardware cost | More complex, more expensive | Simpler, cheaper to implement |
| Comparison operations | Special handling for sign bit | Direct comparison works |
Because two's complement requires only one hardware adder circuit that works identically for positive and negative numbers, every modern CPU — from your smartphone chip to server processors — uses two's complement for signed integer arithmetic.
Overflow in Two's Complement
Overflow occurs when an arithmetic operation produces a result outside the range of the bit width. In two's complement, overflow is detected when the sign bit of the result is incorrect.
In two's complement addition, overflow occurs when: two positive numbers add to a negative result, or two negative numbers add to a positive result. If the carry into the sign bit differs from the carry out of the sign bit, overflow has occurred. Adding a positive and a negative number can NEVER overflow.
| Operation (8-bit) | Result Bits | Decimal Result | Overflow? |
|---|---|---|---|
| 127 + 1 | 10000000 | Looks like -128 | YES — positive + positive = negative |
| -128 + (-1) | 01111111 | Looks like +127 | YES — negative + negative = positive |
| 100 + 27 | 01111111 | +127 | No overflow |
| 50 + (-30) | 00010100 | +20 | No overflow (mixed signs never overflow) |
Two's Complement vs One's Complement
One's complement is a simpler method — just flip all bits. Two's complement adds 1 after flipping. Here is why the extra step matters:
| Property | One's Complement | Two's Complement |
|---|---|---|
| Method | Flip all bits | Flip all bits, then add 1 |
| -0 problem | Two zeros (all 0s and all 1s) | Only one zero |
| Addition | Requires end-around carry | Simple binary addition works |
| Used in modern CPUs | No | Yes — universal standard |
| Example: -5 in 8-bit | 11111010 | 11111011 |
Real-World Applications of Two's Complement
Two's complement is not just a computer science textbook topic — it affects real programming decisions daily: